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Dagstuhl Seminar 26042

Trustworthy System Architectures for the Age of Custom Silicon

( Jan 18 – Jan 21, 2026 )

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Please use the following short url to reference this page: https://www.dagstuhl.de/26042

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Schedule

Motivation

In recent years, we have entered what can be called the "age of custom silicon", characterized by an increasing number of industry players designing their own processing chips tailored to specific workloads. These designs integrate carefully selected general-purpose cores alongside custom accelerators optimized for performance and efficiency requirements. The rise of generative AI and large language models has dramatically accelerated this trend, creating an urgent demand for more efficient and specialized hardware solutions.

Simultaneously, we find ourselves in the "age of hardware vulnerabilities". Since the watershed moment of Meltdown and Spectre in 2018, microarchitectural side-channel vulnerabilities have moved from academic concerns to real-world threats. The growing complexity of system architectures – combining new and existing hardware components in novel ways – has triggered a proliferation of security vulnerabilities across devices, processors, and firmware. This complexity creates unforeseen attack surfaces that traditional security approaches struggle to address effectively.

This Dagstuhl Seminar aims to bring together experts from the computer architecture, operating systems, and security communities to explore the intersection of these disciplines and to develop integrated approaches for trustworthy system design. We will examine three key areas: security analysis of hardware-software co-design; secure, efficient, and correct hardware architectures; and improved alignment between hardware architectures and system software design. Synergizing these three areas, we will recognize trustworthiness as a multidisciplinary effort and focus on the development of cross-layer approaches that can reduce the impact of potential hardware security issues.

The seminar will seek to foster deep, interdisciplinary collaboration to co-design better integration of custom hardware while establishing appropriate security controls across all levels of the stack. Through invited talks, breakout sessions, and focused discussions, participants will work toward identifying key properties for trustworthy silicon architectures, culminating in guidelines and open research questions that can inspire both academic research and industry practices. Our goal is to chart a path forward for realizing the age of custom silicon with trustworthiness built in from the ground up rather than added as an afterthought.

Copyright Jonathan Balkind, Michael Roitzsch, Shweta Shinde, and Jo Van Bulck

Participants

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  • Fritz Alder (NVIDIA - Santa Clara, US) [dblp]
  • Jonathan Balkind (University of California - Santa Barbara, US) [dblp]
  • Andrew Baumann (Google - Zürich, CH) [dblp]
  • Erik Bosman (VU Amsterdam, NL)
  • Bryan Cantrill (Oxide - Emeryville, US) [dblp]
  • Charly Castes (EPFL - Lausanne, CH)
  • David Chisnall (SCI Semiconductor - Sheffield, GB) [dblp]
  • Lesly-Ann Daniel (EURECOM - Biot, FR)
  • Jesse De Meulemeester (KU Leuven, BE) [dblp]
  • Thomas Eisenbarth (Universität Lübeck, DE) [dblp]
  • Ben Fiedler (ETH Zürich, CH) [dblp]
  • Daniel Gruss (TU Graz, AT) [dblp]
  • Marco Guarnieri (IMDEA Software Institute - Madrid, ES) [dblp]
  • Neelu S. Kalani (EPFL - Lausanne, CH) [dblp]
  • Lena Olson (Google - Madison, US) [dblp]
  • Anna Pätschke (Universität Lübeck, DE) [dblp]
  • Kaveh Razavi (ETH Zürich, CH) [dblp]
  • Michael Roitzsch (Barkhausen Institut - Dresden, DE) [dblp]
  • Adrian Sampson (Cornell University - Ithaca, US) [dblp]
  • Nuno Santos (INESC-ID - Lisbon, PT) [dblp]
  • Jasmin Schult (ETH Zürich, CH)
  • Michael Schwarz (CISPA - Saarbrücken, DE) [dblp]
  • Shweta Shinde (ETH Zürich, CH)
  • Flavien Solt (University of California - Berkeley, US) [dblp]
  • Jo Van Bulck (DistriNet, KU Leuven, BE) [dblp]
  • Ingrid Verbauwhede (KU Leuven, BE) [dblp]
  • Carsten Weinhold (Barkhausen Institut - Dresden, DE) [dblp]

Classification
  • Hardware Architecture
  • Operating Systems

Keywords
  • hardware architecture
  • operating systems
  • accelerators
  • security vulnerabilities
  • security