16.05.16 - 20.05.16, Seminar 16202

Hardware Security

Diese Seminarbeschreibung wurde vor dem Seminar auf unseren Webseiten veröffentlicht und bei der Einladung zum Seminar verwendet.


The convergence of IT systems, data networks (including but not limited to the Internet) and ubiquitous embedded devices within the cyber-physical system paradigm has led to the emergence of new security threats associated with the system hardware. Manipulating the hardware components that implement security functions can compromise system integrity, provide unauthorized access to protected data, and endanger intellectual property. Additionally, secure hardware is required to protect software in a proper manner tampering. Addressing these vulnerabilities is essential in order to prevent the hardware from becoming the Achilles heel of today’s systems. Current technology trends point towards massive utilization of hardware circuits in larger cyberphysical systems that are interacting with the physical environment via sensors and actuators. At the same time cyber physical systems are more and more integrated via open networks, most notably the Internet. Moreover, they interact with each other, forming systems of systems that exhibit highly complex, emergent behavior and constantly change their boundaries, with new sub-systems continuously entering and leaving. As a consequence, hardware-related threats must be addressed by appropriate countermeasures at realistic costs.

The seminar will focus on security threats where hardware components play the main role, and on countermeasures to address these threats. The emphasis is on generic algorithmic advances on the boundary between computer science and other disciplines. While Hardware Security is a very diverse scientific field, the seminar will specifically focus on its three main areas: passive and active side-channel analysis of security-relevant hardware components (cryptographic blocks, true random number generators) which goes beyond classical cryptanalysis; physical unclonable functions (PUFs) and authentication solutions on their basis; and new threats through hardware Trojans and counterfeit ICs as well as techniques for their detection and neutralization.

The following questions will serve as a starting point:

  • How to model side-channel attacks such as to balance between accuracy and simplicity?
  • Are there automatic methods to derive a fault-based attack for a given secure circuit?
  • How much reverse engineering is required for practical attacks, and can it be prevented?
  • Can code-based error detection provide a generic mechanism against attacks and Trojans?
  • How to balance between security, quality, yield and reliability of an integrated circuit?
  • How dependent are physical unclonable functions on specific sources of variability?
  • What are the best PUF-based protocols, and what emerging applications do they enable?
  • Can hardware Trojans be detected by low-cost approaches with sufficient confidence?
  • How do counterfeit ICs compromise system security, reliability, and availability?

The seminar will bring together researchers working on different aspects of hardware security and contributing competence in neighboring disciplines: cryptography and cryptanalysis; electrical engineering and circuit design; formal methods and solver technology; test methods, reliability and failure analysis; and information and coding theory. Scientists from academia and industry throughout the world are invited to the seminar.