June 8 – 13 , 2008, Dagstuhl Seminar 08241

Transactional Memory: From Implementation to Application


Christof Fetzer (TU Dresden, DE)
Tim Harris (Microsoft Research UK – Cambridge, GB)
Maurice Herlihy (Brown University – Providence, US)
Nir Shavit (Tel Aviv University, IL)

The Dagstuhl Foundation gratefully acknowledges the donation from:

  •   Microsoft Research, Cambridge, UK

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List of Participants


A goal of current multiprocessor software design is to introduce parallelism into software applications by allowing operations that do not conflict in accessing memory to proceed concurrently. The key tool in designing concurrent data structures has been the use of locks. Unfortunately, course grained locking is easy to program with, but provides very poor performance because of limited parallelism. Fine-grained lock-based concurrent data structures perform exceptionally well, but designing them has long been recognized as a difficult task better left to experts. If concurrent programming is to become ubiquitous, researchers agree that one must develop alternative approaches that simplify code design and verification.

The transactional memory programming paradigm is on its way to becoming the approach of choice for replacing locks in concurrent programming. Combining sequences of concurrent operations into atomic transactions seems to promise a great reduction in the complexity of both programming and verification, by making parts of the code appear to be sequential without the need to program fine-grained locks. Transactions will hopefully remove from the programmer the burden of figuring out the interaction among concurrent operations that happen to conflict when accessing the same locations in memory. There has been a flurry of work on transactional memory systems, hardware implementations (HTM), purely software based ones, i.e. software transactional memories (STM), and hybrid schemes (HyTM) that combine hardware and software.

The need for techniques such as transactional memory has become ever so urgent with the shift in our basic computing paradigm from single core chips to multi-core chips: we are soon to see a multiprocessor on every desktop, and we need ways of programming them efficiently. Many of the big hardware and software vendors are scrambling to invest in transactional memory research and development, and academia is in a great need to coordinate the many world-wide research efforts on the topic.

This Dagstuhl seminar brought together leading researchers working on transactional memory (HTM, STM, and HyTM) from both industry and academia, in order for the dialog to help to create a concerted effort in pushing forward this important research agenda. We discussed several ongoing research directions in transactional memory:

  • What are the fundamental approaches in development of STM platforms for the new class of multi-core machines?
  • What support do transactions need in hardware, compilation, library support, and how would HTM and STM systems interoperate?
  • How do we build TM-based applications and what should the STM/HTM implementations provide to simplify their design given application development experience?
  • What programming language transactional constructs would best help in programming, and what are the issues with their implementation?
  • Can we put together a complete transactional programming environment given current knowledge, that is, hardware, software, and programming language support?

In summary, our seminar addressed various issues of STM design from both the implementation and application perspectives, with a meaningful and intense discussion among the researchers that improved our understanding of both. Hopefully, this will eventually result in better transactional memory platforms that make for faster and simpler-to-program concurrent applications.

Dagstuhl Seminar Series


  • Data Structures / Algorithms / Complexity
  • Hardware
  • Programming Languages / Compiler


  • Multiprocessors
  • Multi-core machines
  • Concurrent Programming
  • Parallel Programming
  • Synchronization
  • Transactional Memory


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