Dagstuhl Seminar 10281
Dynamically Reconfigurable Architectures
( Jul 11 – Jul 16, 2010 )
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Organizers
- Peter M. Athanas (Virginia Polytechnic Institute - Blacksburg, US)
- Jürgen Becker (KIT - Karlsruher Institut für Technologie, DE)
- Jürgen Teich (Universität Erlangen-Nürnberg, DE)
- Ingrid Verbauwhede (KU Leuven, BE)
Contact
- Annette Beyer (for administrative matters)
Dynamic and partial reconfiguration of hardware architectures such as FPGAs and coarse grain processing arrays bring an additional level of flexibility in the design of electronic systems by exploiting the possibility of configuring functions on-demand during run-time. When compared to emerging software-programmable Multi-Processor System-on-a-Chip (MPSoC) solutions, they benefit a lot from lower cost, more dedication and fit to a certain problem class as well as power and area efficiency. This has led to many new ways of approaching existing research topics in the area of hardware design and optimization techniques. For example, the possibility of performing adaptation during run-time raises questions in the areas of dynamic control, real-time response, on-line power management and design complexity, since the reconfigurability increases the design space towards infinity.
This Dagstuhl Seminar on Reconfigurable Architectures has aimed at raising a few of the above topics. In the methodological area, on-line placement, pre-routing/on-line routing and dynamic compaction algorithms and techniques were presented. In the architectural realm, novel interconnection schemes as well as hypermorphic architectures for the future of reconfigurable computing systems in general were introduced and discussed. A major question here was whether programmable multi-core Systems-on-a-Chip (MPSoC) will win margins for typical application domains such as rapid prototyping and emulation and how to scale reconfigurable hardware further in the threat of diminishing returns due to more and more unreliable components of future nano-electronic devices. Also questioned were tool maturity and recent developments in the usage of reconfigurable computing for increase of fault-tolerance. Finally, for the first time, a special focus day was spent on the area of embedded security and the role of reconfigurable hardware in this emerging and important application area.
The workshop started on Sunday evening. After arrival, the attendees joined each other for dinner and discussions, before watching together the soccer world cup final.
- Norbert Abel (Universität Heidelberg, DE)
- Peter M. Athanas (Virginia Polytechnic Institute - Blacksburg, US)
- Lars Bauer (KIT - Karlsruher Institut für Technologie, DE)
- Jürgen Becker (KIT - Karlsruher Institut für Technologie, DE)
- Mladen Berekovic (TU Braunschweig, DE) [dblp]
- Neil W. Bergmann (The University of Queensland - Brisbane, AU)
- Lars Braun (KIT - Karlsruher Institut für Technologie, DE)
- Gordon Brebner (Xilinx - San José, US) [dblp]
- Luigi Carro (Federal University of Rio Grande do Sul, BR)
- Peter Y. K. Cheung (Imperial College London, GB)
- René Cumplido (INAOE - Puebla, MX)
- Christian de Schryver (TU Kaiserslautern, DE) [dblp]
- Oliver Diessel (UNSW - Sydney, AU)
- Saar Drimer (University of Cambridge, GB)
- Diana Göhringer (Fraunhofer IOSB, DE) [dblp]
- Yajun Ha (National University of Singapore, SG)
- Reiner Hartenstein (TU Kaiserslautern, DE)
- Robert Hartl (TU München, DE)
- Christian Hochberger (TU Dresden, DE)
- Michael Hübner (KIT - Karlsruher Institut für Technologie, DE)
- Ralf Jahr (Universität Augsburg, DE) [dblp]
- Andreas Koch (TU Darmstadt, DE)
- Dirk Koch (University of Oslo, NO)
- Ralf König (KIT - Karlsruher Institut für Technologie, DE)
- Michael Meitinger (TU München, DE)
- Nele Mentens (KU Leuven, BE) [dblp]
- Leandro Möller (TU Darmstadt, DE)
- Thilo Pionteck (Universität Lübeck, DE) [dblp]
- Patrick Schaumont (Virginia Polytechnic Institute - Blacksburg, US) [dblp]
- Basher Shehan (Universität Augsburg, DE)
- Gerard J. M. Smit (University of Twente, NL) [dblp]
- Walter Stechele (TU München, DE)
- Thilo Streichert (Daimler AG - Sindelfingen, DE)
- Timo Stripf (KIT - Karlsruher Institut für Technologie, DE)
- Dirk Stroobandt (Ghent University, BE)
- Jürgen Teich (Universität Erlangen-Nürnberg, DE) [dblp]
- Jim Torresen (University of Oslo, NO)
- Sascha Uhrig (Universität Augsburg, DE) [dblp]
- Jozsef Vasarhelyi (University of Miskolc, HU)
- Ingrid Verbauwhede (KU Leuven, BE) [dblp]
- Daniel Ziener (Universität Erlangen-Nürnberg, DE) [dblp]
Related Seminars
- Dagstuhl Seminar 98081: Dynamically Reconfigurable Architectures (1998-02-23 - 1998-02-27) (Details)
- Dagstuhl Seminar 00261: Dynamically Reconfigurable Architectures (2000-06-25 - 2000-06-30) (Details)
- Dagstuhl Seminar 03301: Dynamically Reconfigurable Architectures (2003-07-20 - 2003-07-25) (Details)
- Dagstuhl Seminar 06141: Dynamically Reconfigurable Architectures (2006-04-02 - 2006-04-07) (Details)
Classification
- Hardware Architectures
- Algorithms
- Specification
Keywords
- Dynamically Run-Time Reconfigurable Computing Architectures
- Self- adaptive Systems
- Computational Models
- Circuit Technologies
- System Architecture
- CAD Tool Support
- Reconfigurable/Adaptive Computing based on Nanotechnologies
