Volume
LIPIcs, Volume 262
35th Euromicro Conference on Real-Time Systems (ECRTS 2023)
-
Part of:
Series:
Leibniz International Proceedings in Informatics (LIPIcs)
Conference: Euromicro Conference on Real-Time Systems (ECRTS)
Event
ECRTS 2023, July 11-14, 2023, Vienna, AustriaEditor
Publication Details
- published at: 2023-07-03
- Publisher: Schloss Dagstuhl – Leibniz-Zentrum für Informatik
- ISBN: 978-3-95977-280-8
- DBLP: db/conf/ecrts/ecrts2023
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Document
Complete Volume
LIPIcs, Volume 262, ECRTS 2023, Complete Volume
Abstract
LIPIcs, Volume 262, ECRTS 2023, Complete Volume
Cite as
35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 1-460, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@Proceedings{papadopoulos:LIPIcs.ECRTS.2023,
title = {{LIPIcs, Volume 262, ECRTS 2023, Complete Volume}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {1--460},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023},
URN = {urn:nbn:de:0030-drops-180286},
doi = {10.4230/LIPIcs.ECRTS.2023},
annote = {Keywords: LIPIcs, Volume 262, ECRTS 2023, Complete Volume}
}
Document
Front Matter
Front Matter, Table of Contents, Preface, Conference Organization
Abstract
Front Matter, Table of Contents, Preface, Conference Organization
Cite as
35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 0:i-0:xvi, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{papadopoulos:LIPIcs.ECRTS.2023.0,
author = {Papadopoulos, Alessandro V.},
title = {{Front Matter, Table of Contents, Preface, Conference Organization}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {0:i--0:xvi},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.0},
URN = {urn:nbn:de:0030-drops-180298},
doi = {10.4230/LIPIcs.ECRTS.2023.0},
annote = {Keywords: Front Matter, Table of Contents, Preface, Conference Organization}
}
Document
Scheduling and Compiling Rate-Synchronous Programs with End-To-End Latency Constraints
Abstract
We present an extension of the synchronous-reactive model for specifying multi-rate systems. A set of periodically executed components and their communication dependencies are expressed in a Lustre-like programming language with features for load balancing, resource limiting, and specifying end-to-end latencies. The language abstracts from execution time and phase offsets. This permits simple clock typing rules and a stream-based semantics, but requires each component to execute within an overall base period. A program is compiled to a single periodic task in two stages. First, Integer Linear Programming is used to determine phase offsets using standard encodings for dependencies and load balancing, and a novel encoding for end-to-end latency. Second, a code generation scheme is adapted to produce step functions. As a result, components are synchronous relative to their respective rates, but not necessarily simultaneous relative to the base period. This approach has been implemented in a prototype compiler and validated on an industrial application.
Cite as
Timothy Bourke, Vincent Bregeon, and Marc Pouzet. Scheduling and Compiling Rate-Synchronous Programs with End-To-End Latency Constraints. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 1:1-1:22, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{bourke_et_al:LIPIcs.ECRTS.2023.1,
author = {Bourke, Timothy and Bregeon, Vincent and Pouzet, Marc},
title = {{Scheduling and Compiling Rate-Synchronous Programs with End-To-End Latency Constraints}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {1:1--1:22},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.1},
URN = {urn:nbn:de:0030-drops-180301},
doi = {10.4230/LIPIcs.ECRTS.2023.1},
annote = {Keywords: synchronous-reactive, integer linear programming, code generation}
}
Document
Towards Efficient Explainability of Schedulability Properties in Real-Time Systems
Abstract
The notion of efficient explainability was recently introduced in the context of hard-real-time scheduling: a claim that a real-time system is schedulable (i.e., that it will always meet all deadlines during run-time) is defined to be efficiently explainable if there is a proof of such schedulability that can be verified by a polynomial-time algorithm. We further explore this notion by (i) classifying a variety of common schedulability analysis problems according to whether they are efficiently explainable or not; and (ii) developing strategies for dealing with those determined to not be efficiently schedulable, primarily by identifying practically meaningful sub-problems that are efficiently explainable.
Cite as
Sanjoy Baruah and Pontus Ekberg. Towards Efficient Explainability of Schedulability Properties in Real-Time Systems. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 2:1-2:20, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{baruah_et_al:LIPIcs.ECRTS.2023.2,
author = {Baruah, Sanjoy and Ekberg, Pontus},
title = {{Towards Efficient Explainability of Schedulability Properties in Real-Time Systems}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {2:1--2:20},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.2},
URN = {urn:nbn:de:0030-drops-180313},
doi = {10.4230/LIPIcs.ECRTS.2023.2},
annote = {Keywords: Recurrent Task Systems, Uniprocessor and Multiprocessor Schedulability, Verification, Explanation, Computational Complexity, Approximation Schemes}
}
Document
The Safe and Effective Use of Low-Assurance Predictions in Safety-Critical Systems
Abstract
The algorithm-design paradigm of algorithms using predictions is explored as a means of incorporating the computations of lower-assurance components (such as machine-learning based ones) into safety-critical systems that must have their correctness validated to very high levels of assurance. The paradigm is applied to two simple example applications that are relevant to the real-time systems community: energy-aware scheduling, and classification using ML-based classifiers in conjunction with more reliable but slower deterministic classifiers. It is shown how algorithms using predictions achieve much-improved performance when the low-assurance computations are correct, at a cost of no more than a slight performance degradation even when they turn out to be completely wrong.
Cite as
Kunal Agrawal, Sanjoy Baruah, Michael A. Bender, and Alberto Marchetti-Spaccamela. The Safe and Effective Use of Low-Assurance Predictions in Safety-Critical Systems. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 3:1-3:19, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{agrawal_et_al:LIPIcs.ECRTS.2023.3,
author = {Agrawal, Kunal and Baruah, Sanjoy and Bender, Michael A. and Marchetti-Spaccamela, Alberto},
title = {{The Safe and Effective Use of Low-Assurance Predictions in Safety-Critical Systems}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {3:1--3:19},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.3},
URN = {urn:nbn:de:0030-drops-180323},
doi = {10.4230/LIPIcs.ECRTS.2023.3},
annote = {Keywords: Algorithms using predictions, robust scheduling, energy minimization, classification, on-line scheduling}
}
Document
Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs
Abstract
Temporal isolation is one of the most significant challenges that must be addressed before Multi-Processor Systems-on-Chip (MPSoCs) can be widely adopted in mixed-criticality systems with both time-sensitive real-time (RT) applications and performance-oriented non-real-time (NRT) applications. Specifically, the main memory subsystem is one of the most prevalent causes of interference, performance degradation and loss of isolation. Existing memory bandwidth regulation mechanisms use static, dynamic, or predictive DRAM bandwidth management techniques to restore the execution time of an application under contention as close as possible to the execution time in isolation.
In this paper, we propose a novel distribution-driven regulation whose goal is to achieve a timeliness objective formulated as a constraint on the probability of meeting a certain target execution time for the RT applications. Using existing interconnect-level Performance Monitoring Units (PMU), we can observe the Cumulative Distribution Function (CDF) of the per-request memory latency. Regulation is then triggered to enforce first-order stochastical dominance with respect to a desired reference. Consequently, it is possible to enforce that the overall observed execution time random variable is dominated by the reference execution time. The mechanism requires no prior information of the contending application and treats the DRAM subsystem as a black box. We provide a full-stack implementation of our mechanism on a Commercial Off-The-Shelf (COTS) platform (Xilinx Ultrascale+ MPSoC), evaluate it using real and synthetic benchmarks, experimentally validate that the timeliness objectives are met for the RT applications, and demonstrate that it is able to provide 2.2x more overall throughput for NRT applications compared to DRAM bandwidth management-based regulation approaches.
Cite as
Ahsan Saeed, Denis Hoornaert, Dakshina Dasari, Dirk Ziegenbein, Daniel Mueller-Gritschneder, Ulf Schlichtmann, Andreas Gerstlauer, and Renato Mancuso. Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 4:1-4:23, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{saeed_et_al:LIPIcs.ECRTS.2023.4,
author = {Saeed, Ahsan and Hoornaert, Denis and Dasari, Dakshina and Ziegenbein, Dirk and Mueller-Gritschneder, Daniel and Schlichtmann, Ulf and Gerstlauer, Andreas and Mancuso, Renato},
title = {{Memory Latency Distribution-Driven Regulation for Temporal Isolation in MPSoCs}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {4:1--4:23},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.4},
URN = {urn:nbn:de:0030-drops-180339},
doi = {10.4230/LIPIcs.ECRTS.2023.4},
annote = {Keywords: temporal isolation, memory latency, real-time system, multi-core}
}
Document
Quasi Isolation QoS Setups to Control MPSoC Contention in Integrated Software Architectures
Abstract
The use of integrated architectures, such as integrated modular avionics (IMA) in avionics, IMA-SP in space, and AUTOSAR in automotive, running on Multi-Processor System-on-Chip (MPSoC) is on the rise. Timing isolation among the different software partitions or applications thereof in an integrated architecture is key to simplifying software integration and its timing validation by ensuring the performance of each partition has no or very limited impact on others despite they share MPSoC’s hardware resources. In this work, we contend that the increasing hardware support for Quality of Service (QoS) guarantees in modern MPSoCs can be leveraged via specific setups to provide strong, albeit not full, isolation among different software partitions. We introduce the concept of Quasi Isolation QoS (QIQoS) setups and instantiate it in the Xilinx Zynq UltraScale+. To that end, out of the millions of setups offered by the different QoS mechanisms, we identify specific QoS configurations that isolate the traffic of time-critical software partitions executing in the core cluster from that generated by contender partitions in the programmable logic. Our results show that the selected isolation setup results in performance variations of the partitions run in the computing cores that are below 6 percentage points, even under scenarios with extremely high traffic coming from the programmable logic.
Cite as
Sergio Garcia-Esteban, Alejandro Serrano-Cases, Jaume Abella, Enrico Mezzetti, and Francisco J. Cazorla. Quasi Isolation QoS Setups to Control MPSoC Contention in Integrated Software Architectures. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 5:1-5:25, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{garciaesteban_et_al:LIPIcs.ECRTS.2023.5,
author = {Garcia-Esteban, Sergio and Serrano-Cases, Alejandro and Abella, Jaume and Mezzetti, Enrico and Cazorla, Francisco J.},
title = {{Quasi Isolation QoS Setups to Control MPSoC Contention in Integrated Software Architectures}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {5:1--5:25},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.5},
URN = {urn:nbn:de:0030-drops-180346},
doi = {10.4230/LIPIcs.ECRTS.2023.5},
annote = {Keywords: Multicore, Interference, QoS}
}
Document
FusionClock: Energy-Optimal Clock-Tree Reconfigurations for Energy-Constrained Real-Time Systems
Abstract
Numerous embedded real-time systems have, besides their timing requirements, strict energy constraints that must be satisfied. Examples of this class of real-time systems are implantable medical devices, where knowledge of the worst-case execution time (WCET) has the same importance as of the worst-case energy consumption (WCEC) in order to provide runtime guarantees. The core hardware component of modern system-on-chip (SoC) platforms to configure the tradeoff between time and energy is the system’s clock tree, which provides the necessary clock source to all connected devices (i.e., memory, sensors, transceivers). Existing energy-aware scheduling approaches have shortcomings with regard to these modern, feature-rich clock trees: First, with their reactive, dynamic (re-)configuration of the clock tree, they are not able to provide static guarantees of the system’s resource consumption (i.e., energy and time). Second, they only account for dynamic voltage/frequency scaling of the CPU and thereby miss the reconfiguration of clock sources and clock speed for the other connected devices on such SoCs. Third, they neglect the reconfiguration penalties of frequency scaling and clock/power gating in the presence of the CPU’s sleep modes.
In this paper, we present FusionClock, an approach that exploits a fine-grained model of the system’s temporal and energetic behavior. By means of our developed clock-tree model, FusionClock processes time-triggered schedules and finally generates optimized code for a system where offline-determined and online-applied reconfigurations lead to the worst-case-optimal energy demand while still meeting given timing-related deadlines. For statically determining these energy-optimal reconfigurations on task level, FusionClock builds a mathematical optimization problem based on the tasks' specifications and the system’s resource-consumption model. Specific components like transceivers of SoCs usually have strict requirements regarding the used clock source (e.g., phase-locked loop, RC network, oscillator). FusionClock accounts for these clock-tree requirements with its ability to exploit application-specific knowledge within an optimization problem. With our resource-consumption model for a modern SoC platform and our open-source prototype of FusionClock, we are able to achieve significant energy savings while still providing guarantees for timeliness, as our evaluations on a real hardware platform (i.e., ESP32-C3) show.
Cite as
Eva Dengler, Phillip Raffeck, Simon Schuster, and Peter Wägemann. FusionClock: Energy-Optimal Clock-Tree Reconfigurations for Energy-Constrained Real-Time Systems. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 6:1-6:23, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{dengler_et_al:LIPIcs.ECRTS.2023.6,
author = {Dengler, Eva and Raffeck, Phillip and Schuster, Simon and W\"{a}gemann, Peter},
title = {{FusionClock: Energy-Optimal Clock-Tree Reconfigurations for Energy-Constrained Real-Time Systems}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {6:1--6:23},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.6},
URN = {urn:nbn:de:0030-drops-180354},
doi = {10.4230/LIPIcs.ECRTS.2023.6},
annote = {Keywords: energy-aware scheduling, device-aware whole-system analysis, clock tree}
}
Document
CAWET: Context-Aware Worst-Case Execution Time Estimation Using Transformers
Abstract
This paper presents CAWET, a hybrid worst-case program timing estimation technique. CAWET identifies the longest execution path using static techniques, whereas the worst-case execution time (WCET) of basic blocks is predicted using an advanced language processing technique called Transformer-XL. By employing Transformers-XL in CAWET, the execution context formed by previously executed basic blocks is taken into account, allowing for consideration of the micro-architecture of the processor pipeline without explicit modeling. Through a series of experiments on the TacleBench benchmarks, using different target processors (Arm Cortex M4, M7, and A53), our method is demonstrated to never underestimate WCETs and is shown to be less pessimistic than its competitors.
Cite as
Abderaouf N Amalou, Elisa Fromont, and Isabelle Puaut. CAWET: Context-Aware Worst-Case Execution Time Estimation Using Transformers. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 7:1-7:20, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{amalou_et_al:LIPIcs.ECRTS.2023.7,
author = {Amalou, Abderaouf N and Fromont, Elisa and Puaut, Isabelle},
title = {{CAWET: Context-Aware Worst-Case Execution Time Estimation Using Transformers}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {7:1--7:20},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.7},
URN = {urn:nbn:de:0030-drops-180367},
doi = {10.4230/LIPIcs.ECRTS.2023.7},
annote = {Keywords: Worst-case execution time, machine learning, transformers, hybrid technique}
}
Document
Precise Scheduling of DAG Tasks with Dynamic Power Management
Abstract
The rigid timing requirement of real-time applications biases the analysis to focus on the worst-case performances. Such a focus cannot provide enough information to optimize the system’s typical resource and energy consumption. In this work, we study the real-time scheduling of parallel tasks on a multi-speed heterogeneous platform while minimizing their typical-case CPU energy consumption. Dynamic power management (DPM) policy is integrated to determine the minimum number of cores required for each task while guaranteeing worst-case execution requirements (under all circumstances). A Hungarian Algorithm-based task partitioning technique is proposed for clustered multi-core platforms, where all cores within the same cluster run at the same speed at any time, while different clusters may run at different speeds. To our knowledge, this is the first work aiming to minimize typical-case CPU energy consumption (while ensuring the worst-case timing correctness for all tasks under any execution condition) through DPM for parallel tasks in a clustered platform. We demonstrate the effectiveness of the proposed approach with existing power management techniques using experimental results and simulations. The experimental results conducted on the Intel Xeon 2680 v3 12-core platform show around 7%-30% additional energy savings.
Cite as
Ashikahmed Bhuiyan, Mohammad Pivezhandi, Zhishan Guo, Jing Li, Venkata Prashant Modekurthy, and Abusayeed Saifullah. Precise Scheduling of DAG Tasks with Dynamic Power Management. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 8:1-8:24, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{bhuiyan_et_al:LIPIcs.ECRTS.2023.8,
author = {Bhuiyan, Ashikahmed and Pivezhandi, Mohammad and Guo, Zhishan and Li, Jing and Modekurthy, Venkata Prashant and Saifullah, Abusayeed},
title = {{Precise Scheduling of DAG Tasks with Dynamic Power Management}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {8:1--8:24},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.8},
URN = {urn:nbn:de:0030-drops-180372},
doi = {10.4230/LIPIcs.ECRTS.2023.8},
annote = {Keywords: Parallel task, mixed-criticality scheduling, energy minimization, dynamic power management, cluster-based platform}
}
Document
Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications
Abstract
Many modern applications need to run on massively interconnected sets of heterogeneous nodes, ranging from IoT devices to edge nodes up to the Cloud. In this scenario, communication is often implemented using the publish-subscribe paradigm. The Data Distribution Service (DDS) is a popular middleware specification adopting such a paradigm. The DDS is becoming a key enabler for massively distributed real-time applications, with popular frameworks such as ROS 2 and AUTOSAR Adaptive building on it. However, no formal modeling and analysis of the timing properties of DDS has been provided to date. This paper fills this gap by providing an abstract model for DDS systems that can be generalized to any implementation compliant with the specification. A concrete instance of the generic DDS model is provided for the case of eProsima’s FastDDS, which is eventually used to provide a real-time analysis that bounds the data-delivery latency of DDS messages. Finally, this paper reports on an evaluation based on a representative automotive application from the WATERS 2019 challenge by Bosch.
Cite as
Gerlando Sciangula, Daniel Casini, Alessandro Biondi, Claudio Scordino, and Marco Di Natale. Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 9:1-9:26, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{sciangula_et_al:LIPIcs.ECRTS.2023.9,
author = {Sciangula, Gerlando and Casini, Daniel and Biondi, Alessandro and Scordino, Claudio and Di Natale, Marco},
title = {{Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {9:1--9:26},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.9},
URN = {urn:nbn:de:0030-drops-180381},
doi = {10.4230/LIPIcs.ECRTS.2023.9},
annote = {Keywords: DDS, real-time systems, response-time analysis, end-to-end latency, CPA}
}
Document
On the Equivalence of Maximum Reaction Time and Maximum Data Age for Cause-Effect Chains
Abstract
Real-time systems require a formal guarantee of timing-constraints, not only for individual tasks but also for data-propagation. The timing behavior of data-propagation paths in a given system is typically described by its maximum reaction time and its maximum data age. This paper shows that they are equivalent.
To reach this conclusion, partitioned job chains are introduced, which consist of one immediate forward and one immediate backward job chain. Such partitioned job chains are proven to describe maximum reaction time and maximum data age in a universal manner. This universal description does not only show the equivalence of maximum reaction time and maximum data age, but can also be exploited to speed up the computation of such significantly. In particular, the speed-up for synthesized task sets based on automotive benchmarks can be up to 1600.
Since only very few non-restrictive assumptions are made, the equivalence of maximum data age and maximum reaction time holds for almost any scheduling mechanism and even for tasks which do not adhere to the typical periodic or sporadic task model. This observation is supported by a simulation of a ROS2 navigation system.
Cite as
Mario Günzel, Harun Teper, Kuan-Hsun Chen, Georg von der Brüggen, and Jian-Jia Chen. On the Equivalence of Maximum Reaction Time and Maximum Data Age for Cause-Effect Chains. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 10:1-10:22, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{gunzel_et_al:LIPIcs.ECRTS.2023.10,
author = {G\"{u}nzel, Mario and Teper, Harun and Chen, Kuan-Hsun and von der Br\"{u}ggen, Georg and Chen, Jian-Jia},
title = {{On the Equivalence of Maximum Reaction Time and Maximum Data Age for Cause-Effect Chains}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {10:1--10:22},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.10},
URN = {urn:nbn:de:0030-drops-180392},
doi = {10.4230/LIPIcs.ECRTS.2023.10},
annote = {Keywords: End-to-End, Timing Analysis, Maximum Data Age, Maximum Reaction Time, Cause-Effect Chain, Robot Operating Systems 2 (ROS2)}
}
Document
A New Perspective on Criticality: Efficient State Abstraction and Run-Time Monitoring of Mixed-Criticality Real-Time Control Systems
Abstract
The increasing complexity of real-time systems, comprising control tasks interacting with physics and non-control tasks, comes with substantial challenges: meeting various non-functional requirements implies conflicting design goals and a pronounced gap between worst and average-case resource requirements up to the overall timeliness being unverifiable. Mixed-criticality systems (MCS) is a well-known mitigation concept that operates the system in different criticality levels with timing guarantees given only to the subset of critical tasks. However, in many real-world applications, the criticality of control tasks is tied to the system’s physical state and control deviation, with safety specifications becoming a crucial design objective. Monitoring the physical state and adapting scheduling is inaccessible to MCS but has been dedicated mainly to control engineering approaches such as self-triggered (model-predictive) control. These, however, are hard to integrate with scheduling or expensive at run-time.
This paper explores the potential of linking both worlds and elevating the physical state to a criticality criterion. We, therefore, propose a dedicated state estimation that can be leveraged as a run-time monitor for criticality mode changes. For this purpose, we develop a highly efficient one-dimensional state abstraction to be computed within the operating system’s scheduling. Furthermore, we show how to limit abstraction pessimism by feeding back state measurements robustly. The paper focuses on the control fundamentals and outlines how to leverage this new tool in adaptive scheduling. Our experimental results substantiate the efficiency and applicability of our approach.
Cite as
Tim Rheinfels, Maximilian Gaukler, and Peter Ulbrich. A New Perspective on Criticality: Efficient State Abstraction and Run-Time Monitoring of Mixed-Criticality Real-Time Control Systems. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 11:1-11:26, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{rheinfels_et_al:LIPIcs.ECRTS.2023.11,
author = {Rheinfels, Tim and Gaukler, Maximilian and Ulbrich, Peter},
title = {{A New Perspective on Criticality: Efficient State Abstraction and Run-Time Monitoring of Mixed-Criticality Real-Time Control Systems}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {11:1--11:26},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.11},
URN = {urn:nbn:de:0030-drops-180405},
doi = {10.4230/LIPIcs.ECRTS.2023.11},
annote = {Keywords: Real-time Control, Mixed-Criticality, Switched Systems, State Monitoring}
}
Document
Isospeed: Improving (min,+) Convolution by Exploiting (min,+)/(max,+) Isomorphism
Abstract
(min,+) convolution is the key operation in (min,+) algebra, a theory often used to compute performance bounds in real-time systems. As already observed in many works, its algorithm can be computationally expensive, due to the fact that: i) its complexity is superquadratic with respect to the size of the operands; ii) operands must be extended before starting its computation, and iii) said extension is tied to the least common multiple of the operand periods.
In this paper, we leverage the isomorphism between (min,+) and (max,+) algebras to devise a new algorithm for (min,+) convolution, in which the need for operand extension is minimized. This algorithm is considerably faster than the ones known so far, and it allows us to reduce the computation times of (min,+) convolution by orders of magnitude.
Cite as
Raffaele Zippo, Paul Nikolaus, and Giovanni Stea. Isospeed: Improving (min,+) Convolution by Exploiting (min,+)/(max,+) Isomorphism. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 12:1-12:24, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{zippo_et_al:LIPIcs.ECRTS.2023.12,
author = {Zippo, Raffaele and Nikolaus, Paul and Stea, Giovanni},
title = {{Isospeed: Improving (min,+) Convolution by Exploiting (min,+)/(max,+) Isomorphism}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {12:1--12:24},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.12},
URN = {urn:nbn:de:0030-drops-180415},
doi = {10.4230/LIPIcs.ECRTS.2023.12},
annote = {Keywords: Deterministic Network Calculus, min-plus algebra, max-plus algebra, performance, algorithms}
}
Document
Low-Overhead Online Assessment of Timely Progress as a System Commodity
Abstract
The correctness of safety-critical systems depends on both their logical and temporal behavior. Control-flow integrity (CFI) is a well-established and understood technique to safeguard the logical flow of safety-critical applications. But unfortunately, no established methodologies exist for the complementary problem of detecting violations of control flow timeliness. Worse yet, the latter dimension, which we term Timely Progress Integrity (TPI), is increasingly more jeopardized as the complexity of our embedded systems continues to soar. As key resources of the memory hierarchy become shared by several CPUs and accelerators, they become hard-to-analyze performance bottlenecks. And the precise interplay between software and hardware components becomes hard to predict and reason about. How to restore control over timely progress integrity? We postulate that the first stepping stone toward TPI is to develop methodologies for Timely Progress Assessment (TPA). TPA refers to the ability of a system to live-monitor the positive/negative slack - with respect to a known reference - at key milestones throughout an application’s lifespan. In this paper, we propose one such methodology that goes under the name of Milestone-Based Timely Progress Assessment or MB-TPA, for short. Among the key design principles of MB-TPA is the ability to operate on black-box binary executables with near-zero time overhead and implementable on commercial platforms. To prove its feasibility and effectiveness, we propose and evaluate a full-stack implementation called Timely Progress Assessment with 0 Overhead (TPAw0v). We demonstrate its capability in providing live TPA for complex vision applications while introducing less than 0.6% time overhead for applications under test. Finally, we demonstrate one use case where TPA information is used to restore TPI in the presence of temporal interference over shared memory resources.
Cite as
Weifan Chen, Ivan Izhbirdeev, Denis Hoornaert, Shahin Roozkhosh, Patrick Carpanedo, Sanskriti Sharma, and Renato Mancuso. Low-Overhead Online Assessment of Timely Progress as a System Commodity. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 13:1-13:26, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{chen_et_al:LIPIcs.ECRTS.2023.13,
author = {Chen, Weifan and Izhbirdeev, Ivan and Hoornaert, Denis and Roozkhosh, Shahin and Carpanedo, Patrick and Sharma, Sanskriti and Mancuso, Renato},
title = {{Low-Overhead Online Assessment of Timely Progress as a System Commodity}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {13:1--13:26},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.13},
URN = {urn:nbn:de:0030-drops-180428},
doi = {10.4230/LIPIcs.ECRTS.2023.13},
annote = {Keywords: progress-aware regulation, hardware assisted runtime monitoring, timing annotation, control flow graph}
}
Document
Consensual Resilient Control: Stateless Recovery of Stateful Controllers
Abstract
Safety-critical systems have to absorb accidental and malicious faults to obtain high mean-times-to-failures (MTTFs). Traditionally, this is achieved through re-execution or replication. However, both techniques come with significant overheads, in particular when cold-start effects are considered. Such effects occur after replicas resume from checkpoints or from their initial state. This work aims at improving on the performance of control-task replication by leveraging an inherent stability of many plants to tolerate occasional control-task deadline misses and suggests masking faults just with a detection quorum. To make this possible, we have to eliminate cold-start effects to allow replicas to rejuvenate during each control cycle. We do so, by systematically turning stateful controllers into instants that can be recovered in a stateless manner. We highlight the mechanisms behind this transformation, how it achieves consensual resilient control, and demonstrate on the example of an inverted pendulum how accidental and maliciously-induced faults can be absorbed, even if control tasks run in less predictable environments.
Cite as
Aleksandar Matovic, Rafal Graczyk, Federico Lucchetti, and Marcus Völp. Consensual Resilient Control: Stateless Recovery of Stateful Controllers. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 14:1-14:27, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{matovic_et_al:LIPIcs.ECRTS.2023.14,
author = {Matovic, Aleksandar and Graczyk, Rafal and Lucchetti, Federico and V\"{o}lp, Marcus},
title = {{Consensual Resilient Control: Stateless Recovery of Stateful Controllers}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {14:1--14:27},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.14},
URN = {urn:nbn:de:0030-drops-180430},
doi = {10.4230/LIPIcs.ECRTS.2023.14},
annote = {Keywords: resilience, control, replication}
}
Document
Impact of Transient Faults on Timing Behavior and Mitigation with Near-Zero WCET Overhead
Abstract
As time-critical systems require timing guarantees, Worst-Case Execution Times (WCET) have to be employed. However, WCET estimation methods usually assume fault-free hardware. If proper actions are not taken, such fault-free WCET approaches become unsafe, when faults impact the hardware during execution. The majority of approaches, dealing with hardware faults, address the impact of faults on the functional behavior of an application, i.e., denial of service and binary correctness. Few approaches address the impact of faults on the application timing behavior, i.e., time to finish the application, and target faults occurring in memories. However, as the transistor size in modern technologies is significantly reduced, faults in cores cannot be considered negligible anymore. This work shows that faults not only affect the functional behavior, but they can have a significant impact on the timing behavior of applications. To expose the overall impact of faults, we enhance vulnerability analysis to include not only functional, but also timing correctness, and show that faults impact WCET estimations. As common techniques to deal with faults, such as watchdog timers and re-execution, have large timing overhead for error detection and correction, we propose a mechanism with near-zero and bounded timing overhead. A RISC-V core is used as a case study. The obtained results show that faults can lead up to almost 700% increase in the maximum observed execution time between fault-free and faulty execution without protection, affecting the WCET estimations. On the contrary, the proposed mechanism is able to restore fault-free WCET estimations with a bounded overhead of 2 execution cycles.
Cite as
Pegdwende Romaric Nikiema, Angeliki Kritikakou, Marcello Traiola, and Olivier Sentieys. Impact of Transient Faults on Timing Behavior and Mitigation with Near-Zero WCET Overhead. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 15:1-15:22, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{nikiema_et_al:LIPIcs.ECRTS.2023.15,
author = {Nikiema, Pegdwende Romaric and Kritikakou, Angeliki and Traiola, Marcello and Sentieys, Olivier},
title = {{Impact of Transient Faults on Timing Behavior and Mitigation with Near-Zero WCET Overhead}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {15:1--15:22},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.15},
URN = {urn:nbn:de:0030-drops-180445},
doi = {10.4230/LIPIcs.ECRTS.2023.15},
annote = {Keywords: Transient faults, Timing impact, Near-zero WCET error detection and correction, Vulnerability analysis}
}
Document
Optimal Multiprocessor Locking Protocols Under FIFO Scheduling
Abstract
Real-time locking protocols are typically designed to reduce any priority-inversion blocking (pi-blocking) a task may incur while waiting to access a shared resource. For the multiprocessor case, a number of such protocols have been developed that ensure asymptotically optimal pi-blocking bounds under job-level fixed-priority scheduling. Unfortunately, no optimal multiprocessor real-time locking protocols are known that ensure tight pi-blocking bounds under any scheduler. This paper presents the first such protocols. Specifically, protocols are presented for mutual exclusion, reader-writer synchronization, and k-exclusion that are optimal under first-in-first-out (FIFO) scheduling when schedulability analysis treats suspension times as computation. Experiments are presented that demonstrate the effectiveness of these protocols.
Cite as
Shareef Ahmed and James H. Anderson. Optimal Multiprocessor Locking Protocols Under FIFO Scheduling. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 16:1-16:21, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{ahmed_et_al:LIPIcs.ECRTS.2023.16,
author = {Ahmed, Shareef and Anderson, James H.},
title = {{Optimal Multiprocessor Locking Protocols Under FIFO Scheduling}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {16:1--16:21},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.16},
URN = {urn:nbn:de:0030-drops-180451},
doi = {10.4230/LIPIcs.ECRTS.2023.16},
annote = {Keywords: Real-Time Systems, Real-Time Synchronization, Multiprocessors}
}
Document
A Tight Holistic Memory Latency Bound Through Coordinated Management of Memory Resources
Abstract
To facilitate the safe adoption of multi-core platforms in real-time systems, a plethora of recent research efforts aim at bounding the delays induced by interference upon accessing the shared memory resources in these platforms. These efforts, despite their value, are scattered, with each one focusing solely on only one of these resources with the premise that latency bounds separately driven for each resource can be added all together to provide a safe end-to-end memory bound. In this work, we put this assumption to the test for the first time by 1) considering a realistic multi-core memory hierarchy system, 2) deriving the bounds for accessing the shared resources in this system, and 3) highlighting the limitations of this widely-adopted approach. In particular, we show that this approach leads to not only excessively pessimistic but also unsafe bounds. Motivated by these findings, we propose GRROF: a novel approach to predictably and efficiently schedule memory requests while traversing the entire memory hierarchy through coordination among arbiters managing all the resources in this hierarchy. By virtue of this novel mechanism, we managed to exploit pipelining upon analyzing the latency of the memory requests for tightly bounding the worst-case latency. We prove in the paper that GRROF enables us to derive a drastically tighter bound compared to the common additive latency approach with more than 18× reduction in the end-to-end memory latency bound for a modern Out-of-Order quad-core platform. The reduction is further improved significantly with the increase in the number of cores. The proposed solution is fully prototyped and tested in a cycle-accurate simulation. We also compare it with real-time competitive state-of-the-art and performance-oriented solutions existing in modern Commercial-off-the-Shelf (COTS) platforms.
Cite as
Shorouk Abdelhalim, Danesh Germchi, Mohamed Hossam, Rodolfo Pellizzoni, and Mohamed Hassan. A Tight Holistic Memory Latency Bound Through Coordinated Management of Memory Resources. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 17:1-17:25, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{abdelhalim_et_al:LIPIcs.ECRTS.2023.17,
author = {Abdelhalim, Shorouk and Germchi, Danesh and Hossam, Mohamed and Pellizzoni, Rodolfo and Hassan, Mohamed},
title = {{A Tight Holistic Memory Latency Bound Through Coordinated Management of Memory Resources}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {17:1--17:25},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.17},
URN = {urn:nbn:de:0030-drops-180463},
doi = {10.4230/LIPIcs.ECRTS.2023.17},
annote = {Keywords: Predictability, Main Memory, Caches, Real-time}
}
Document
Replication-Based Scheduling of Parallel Real-Time Tasks
Abstract
Multiprocessors have become the standard computing platform for real-time embedded systems. To efficiently leverage the computational power of such platforms, software tasks are often characterized by an internal structure where concurrent subtasks can execute in parallel on different processors. Existing strategies for the scheduling of parallel real-time tasks on multiprocessor platforms, such as partitioned, global, and federated scheduling, were inspired by earlier techniques that were not conceived to explicitly support parallel tasks, thus carrying advantages but also well-known limitations. This paper introduces replication-based scheduling, a specialized scheduling paradigm for parallel real-time DAG tasks. Replication-based scheduling leverages the internal structure of the parallel tasks to assign replicas of the subtasks to different processors, while ensuring that exactly one replica of each subtask will be executed at runtime for every task instance. This approach aims at preserving the advantages of partitioned scheduling while simplifying the timing analysis. The replication-based scheduling framework is first defined, together with a strategy for implementing replication-based scheduling in real-time operating systems. Then, offline allocation strategies for subtask replicas and a response-time analysis are presented. In the provided experiments, the schedulability achieved with replication-based scheduling is compared with that of existing techniques for the scheduling of parallel real-time tasks on multiprocessors.
Cite as
Federico Aromolo, Geoffrey Nelissen, and Alessandro Biondi. Replication-Based Scheduling of Parallel Real-Time Tasks. In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 18:1-18:23, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{aromolo_et_al:LIPIcs.ECRTS.2023.18,
author = {Aromolo, Federico and Nelissen, Geoffrey and Biondi, Alessandro},
title = {{Replication-Based Scheduling of Parallel Real-Time Tasks}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {18:1--18:23},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.18},
URN = {urn:nbn:de:0030-drops-180477},
doi = {10.4230/LIPIcs.ECRTS.2023.18},
annote = {Keywords: Real-Time Systems, Scheduling Algorithms, Schedulability Analysis, Parallel Tasks}
}
Document
Invited Paper
From FMTV to WATERS: Lessons Learned from the First Verification Challenge at ECRTS (Invited Paper)
Abstract
We present here the main features and lessons learned from the first edition of what has now become the ECRTS industrial challenge, together with the final description of the challenge and a comparative overview of the proposed solutions. This verification challenge, proposed by Thales, was first discussed in 2014 as part of a dedicated workshop (FMTV, a satellite event of the FM 2014 conference), and solutions were discussed for the first time at the WATERS 2015 workshop. The use case for the verification challenge is an aerial video tracking system. A specificity of this system lies in the fact that periods are constant but known with a limited precision only. The first part of the challenge focuses on the video frame processing system. It consists in computing maximum values of the end-to-end latency of the frames sent by the camera to the display, for two different buffer sizes, and then the minimum duration between two consecutive frame losses. The second challenge is about computing end-to-end latencies on the tracking and camera control for two different values of jitter. Solutions based on five different tools - Fiacre/Tina, CPAL (simulation and analysis), IMITATOR, UPPAAL and MAST - were submitted for discussion at WATERS 2015. While none of these solutions provided a full answer to the challenge, a combination of several of them did allow to draw some conclusions.
Cite as
Sebastian Altmeyer, Étienne André, Silvano Dal Zilio, Loïc Fejoz, Michael González Harbour, Susanne Graf, J. Javier Gutiérrez, Rafik Henia, Didier Le Botlan, Giuseppe Lipari, Julio Medina, Nicolas Navet, Sophie Quinton, Juan M. Rivas, and Youcheng Sun. From FMTV to WATERS: Lessons Learned from the First Verification Challenge at ECRTS (Invited Paper). In 35th Euromicro Conference on Real-Time Systems (ECRTS 2023). Leibniz International Proceedings in Informatics (LIPIcs), Volume 262, pp. 19:1-19:18, Schloss Dagstuhl – Leibniz-Zentrum für Informatik (2023)
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@InProceedings{altmeyer_et_al:LIPIcs.ECRTS.2023.19,
author = {Altmeyer, Sebastian and Andr\'{e}, \'{E}tienne and Dal Zilio, Silvano and Fejoz, Lo\"{i}c and Harbour, Michael Gonz\'{a}lez and Graf, Susanne and Guti\'{e}rrez, J. Javier and Henia, Rafik and Le Botlan, Didier and Lipari, Giuseppe and Medina, Julio and Navet, Nicolas and Quinton, Sophie and Rivas, Juan M. and Sun, Youcheng},
title = {{From FMTV to WATERS: Lessons Learned from the First Verification Challenge at ECRTS}},
booktitle = {35th Euromicro Conference on Real-Time Systems (ECRTS 2023)},
pages = {19:1--19:18},
series = {Leibniz International Proceedings in Informatics (LIPIcs)},
ISBN = {978-3-95977-280-8},
ISSN = {1868-8969},
year = {2023},
volume = {262},
editor = {Papadopoulos, Alessandro V.},
publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik},
address = {Dagstuhl, Germany},
URL = {https://drops-dev.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2023.19},
URN = {urn:nbn:de:0030-drops-180486},
doi = {10.4230/LIPIcs.ECRTS.2023.19},
annote = {Keywords: Verification challenge, industrial use case, end-to-end latency}
}