http://www.dagstuhl.de/10281

July 11 – 16 , 2010, Dagstuhl Seminar 10281

Dynamically Reconfigurable Architectures

Organizers

Peter M. Athanas (Virginia Polytechnic Institute – Blacksburg, US)
Jürgen Becker (KIT – Karlsruher Institut für Technologie, DE)
Jürgen Teich (Universität Erlangen-Nürnberg, DE)
Ingrid Verbauwhede (KU Leuven, BE)

For support, please contact

Dagstuhl Service Team

Documents

Dagstuhl Seminar Proceedings DROPS
List of Participants

Summary

Dynamic and partial reconfiguration of hardware architectures such as FPGAs and coarse grain processing arrays bring an additional level of flexibility in the design of electronic systems by exploiting the possibility of configuring functions on-demand during run-time. When compared to emerging software-programmable Multi-Processor System-on-a-Chip (MPSoC) solutions, they benefit a lot from lower cost, more dedication and fit to a certain problem class as well as power and area efficiency. This has led to many new ways of approaching existing research topics in the area of hardware design and optimization techniques. For example, the possibility of performing adaptation during run-time raises questions in the areas of dynamic control, real-time response, on-line power management and design complexity, since the reconfigurability increases the design space towards infinity.

This Dagstuhl Seminar on Reconfigurable Architectures has aimed at raising a few of the above topics. In the methodological area, on-line placement, pre-routing/on-line routing and dynamic compaction algorithms and techniques were presented. In the architectural realm, novel interconnection schemes as well as hypermorphic architectures for the future of reconfigurable computing systems in general were introduced and discussed. A major question here was whether programmable multi-core Systems-on-a-Chip (MPSoC) will win margins for typical application domains such as rapid prototyping and emulation and how to scale reconfigurable hardware further in the threat of diminishing returns due to more and more unreliable components of future nano-electronic devices. Also questioned were tool maturity and recent developments in the usage of reconfigurable computing for increase of fault-tolerance. Finally, for the first time, a special focus day was spent on the area of embedded security and the role of reconfigurable hardware in this emerging and important application area.

Dagstuhl Seminar Series

Classification

  • Hardware Architectures
  • Algorithms
  • Specification

Keywords

  • Dynamically Run-Time Reconfigurable Computing Architectures
  • Self- adaptive Systems
  • Computational Models
  • Circuit Technologies
  • System Architecture
  • CAD Tool Support
  • Reconfigurable/Adaptive Computing based on Nanotechnologies

Book exhibition

Books from the participants of the current Seminar 

Book exhibition in the library, ground floor, during the seminar week.

Documentation

In the series Dagstuhl Reports each Dagstuhl Seminar and Dagstuhl Perspectives Workshop is documented. The seminar organizers, in cooperation with the collector, prepare a report that includes contributions from the participants' talks together with a summary of the seminar.

 

Download overview leaflet (PDF).

Publications

Furthermore, a comprehensive peer-reviewed collection of research papers can be published in the series Dagstuhl Follow-Ups.

Dagstuhl's Impact

Please inform us when a publication was published as a result from your seminar. These publications are listed in the category Dagstuhl's Impact and are presented on a special shelf on the ground floor of the library.