Embedded security needs efficient implementations as well as secure implementations.
This presentation first gives general methods to improve the efficiency of security and cryptographic
implementations. Security adds an extra design dimension next to power, area, and throughput optimizations. Several approaches exist to improve the energy efficiency. One way is to use HW/SW co-design. Regarding secure implementations, it refreshes the basic properties that a secure circuit in CMOS technology should possess. Then a link to technology scaling is made. Do advanced sub-micron technologies help or hurt the design for security.