This talk will describe Intel’s new AES instructions which will be part of the Intel Architecture in all processors as of the 2009 generation. The AES architecture consists of six instructions: four instructions to facilitate encryption and decryption, and two instructions to support Key Expansion. Together, they provide a comprehensive hardware solution for AES, offering both high performance and security against side channel attacks. During the talk I will provide information on the instructions and their software usage, the design philosophy that lead to selecting the particular set of instructions, and some details on the resulting performance.