The increasing densities of FPGAs and the availability of dynamic  reconfiguration modes enable hardware multitasking. Circuits are turned into hardware tasks that are scheduled, loaded, and executed on the reconfigurable resource during runtime. During the last years, the feasibility
of hardware multitasking has been demonstrated by several prototypes. For application domains that combine high performance demands with dynamic task sets, a multitasking environment is even  essential.

In this talk, we concentrate on the execution of periodic real-time tasks in a hardware multitasking environment, a problem that has not yet received sufficient attention. We first present three scheduling approaches: global EDF, MSDL, and partitioned EDF. Global and partitioned EDF are techniques adopted from multiprocessor scheduling, MSDL is a server-based scheduling technique trying to minimize the FPGA reconfiguration overhead. We discuss
the construction of the schedules, efficient schedulability tests, and evaluate the scheduling performance by means of a simulation experiment. Then we turn to implementation-oriented issues and compare the scheduling approaches with respect to suitable FPGA execution models and the number of required device reconfigurations.