In this talk, a case for developing an FPGA specifically optimised for floating point applications is given. Applications include signal processing, embedded systems and high performance computing, and such a device is likely to have speed and power consumption advantages over conventional FPGA and microprocessor technology. The performance improvement obtained by adding floating point units (FPUs) to an existing fine grain FPGA is estimated to be 2-10x on a number of benchmark applications. Different architectures involving flash based dynamic reconfiguration and the sharing of configuration bits are also discussed.